HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 186

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.2.5
BAMRB is a 32-bit read/write register. BAMRB specifies bits masked in the break address
specified by BARB.
Note: n = 31 to 0
7.2.6
BDRB is a 32-bit read/write register.
7.2.7
BDMRB is a 32-bit read/write register. BDMRB specifies bits masked in the break data specified
by BDRB.
Notes: n = 31 to 0
Rev. 4.00, 03/04, page 140 of 660
Bit
31 to 0
Bit
31 to 0
Bit
31 to 0
Specify an operand size when including the value of the data bus in the break condition.
When a byte size is selected as a break condition, the break data must be set in bits 15 to 8
in BDRB for an even break address and bits 7 to 0 for an odd break address.
Break Data Register B (BDRB)
Break Address Mask Register B (BAMRB)
Break Data Mask Register B (BDMRB)
Bit Name
BAMB31 to
BAMB0
Bit Name
BDB31 to
BDB0
Bit Name
BDMB31 to
BDMB0
Initial Value
All 0
Initial Value R/W
All 0
Initial Value R/W
All 0
R/W
R/W
R/W
R/W
Description
Break Address Mask
Specifies bits masked in the channel B break
address bits specified by BARB (BAB31 to BAB0).
0: Break address BABn of channel B is included in
1: Break address BABn of channel B is masked and
Description
Break Data Bit
Description
Break Data Mask
0: Break data BDBn of channel B is included in the
1: Break data BDBn of channel B is masked and is
the break condition
is not included in the break condition
break condition
not included in the break condition