HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 499

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 16.9 shows a sample flowchart for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
Serial data reception
No
No
Read receive data in SCFRDR2,
Clear RE bit in SCSCR2 to 0
Read RDF flag in SCSSR2
Read ORER, PER, FER
and clear RDF flag in
PER = 1 or FER = 1?
All data received?
Figure 16.9 Sample Serial Reception Flowchart (1)
flags in SCSSR2
Start reception
End reception
SCSSR2 to 0
RDF = 1?
No
Yes
Yes
Error processing
Yes
1. Receive error handling and break detection:
2. SCIF status check and receive data read :
3. Serial reception continuation procedure: To
Read the DR, ER, and BRK flags in SCSSR2
to identify any error, perform the appropriate
error handling, then clear the DR, ER, and
BRK flags to 0. In the case of a framing
error, a break can also be detected by
reading the value of the RxD2 pin.
Read the SCSSR2 and check that RDF = 1,
then read the receive data in SCFRDR2, read
1 from the RDF flag, and then clear the RDF
flag to 0. The transition of the RDF flag from
0 to 1 can be identified by an RXI interrupt.
continue serial reception, read at least the
receive trigger set number of receive data
bytes from SCFRDR2, read 1 from the RDF
flag, then clear the RDF flag to 0. The
number of receive data bytes in SCFRDR2
can be ascertained by reading the lower bits
of SCFDR2.
Rev. 4.00, 03/04, page 453 of 660