HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 329

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.5.2
The CMT has the following registers. Refer to section 23, List of Registers, for more details of the
addresses and access sizes.
The compare match timer start register (CMSTR) is a 16-bit register that selects whether to operate
or halt the channel 0 and channel 1 counter (CMCNT).
The compare match timer control/status register (CMCSR) is a 16-bit register that indicates the
occurrence of compare matches, sets the enable/disable of interrupts, and establishes the clock
used for incrementation.
Bit
15 to 2
1
0
Bit
15 to 8
Compare match timer start register (CMSTR)
Compare match timer control/status register (CMCSR)
Compare match counter (CMCNT)
Compare match constant register (CMCOR)
Compare Match Timer Start Register (CMSTR)
Compare Match Timer Control/Status Register (CMCSR)
Register Description
Bit Name
—
—
STR0
Bit Name
—
Initial Value
Initial Value
All 0
0
0
All 0
R/W Description
R
R/W Reserved
R/W Count start 0
R/W
R
Reserved
These bits are always read as 0. The write value
should always be 0.
This bit can be read or written. Write 0 when writing.
Selects whether to operate or halt compare match
timer counter 0.
0: CMCNT0 count operation halted
1: CMCNT0 count operation
Description
Reserved
These bits always read as 0. The write value
should always be 0.
Rev. 4.00, 03/04, page 283 of 660