HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 24

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.3
7.4
Section 8 Bus State Controller (BSC) ...............................................................159
8.1
8.2
8.3
8.4
8.5
Rev. 4.00, 03/04, page xxiv of xlvi
Operation .......................................................................................................................... 148
Usage Note........................................................................................................................ 156
Feature .............................................................................................................................. 159
Input/Output Pin................................................................................................................ 161
Area Overview .................................................................................................................. 162
Register Description.......................................................................................................... 169
Operation .......................................................................................................................... 192
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.2.9
7.2.10 Execution Times Break Register (BETR)............................................................ 145
7.2.11 Branch Source Register (BRSR).......................................................................... 146
7.2.12 Branch Destination Register (BRDR).................................................................. 147
7.2.13 Break ASID Register A (BASRA)....................................................................... 147
7.2.14 Break ASID Register B (BASRB) ....................................................................... 148
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
8.3.1
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
8.4.9
8.4.10 Refresh Time Constant Register (RTCOR) ......................................................... 191
8.4.11 Refresh Count Register (RFCR) .......................................................................... 192
8.5.1
8.5.2
Break Address Mask Register A (BAMRA)........................................................ 138
Break Bus Cycle Register A (BBRA).................................................................. 138
Break Address Register B (BARB) ..................................................................... 139
Break Address Mask Register B (BAMRB) ........................................................ 140
Break Data Register B (BDRB) ........................................................................... 140
Break Data Mask Register B (BDMRB).............................................................. 140
Break Bus Cycle Register B (BBRB) .................................................................. 141
Break Control Register (BRCR) .......................................................................... 142
Flow of the User Break Operation ....................................................................... 148
Break on Instruction Fetch Cycle......................................................................... 149
Break by Data Access Cycle................................................................................ 149
Sequential Break .................................................................................................. 150
Value of Saved Program Counter ........................................................................ 150
PC Trace .............................................................................................................. 151
Usage Examples................................................................................................... 153
PCMCIA Support ................................................................................................ 165
Bus Control Register 1 (BCR1) ........................................................................... 169
Bus Control Register 2 (BCR2) ........................................................................... 172
Wait State Control Register 1 (WCR1)................................................................ 174
Wait State Control Register 2 (WCR2)................................................................ 177
Individual Memory Control Register (MCR) ...................................................... 180
PCMCIA Control Register (PCR)........................................................................ 185
Synchronous DRAM Mode Register (SDMR) .................................................... 188
Refresh Timer Control/Status Register (RTCSR)................................................ 188
Refresh Timer Counter (RTCNT)........................................................................ 191
Endian/Access Size and Data Alignment............................................................. 192
Description of Areas ............................................................................................ 197