HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 451

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Note:
Bit
3
2
1
0
* Only 0 can be written, to clear the flag.
Bit Name
PER
TEND
MPB
MPBT
Initial Value
0
1
0
0
R/W
R/(W)*
R
R
R/W
Description
Parity error
Transmission end
Multiprocessor bit
Multiprocessor bit transfer
These bits have the same function as in the ordinary
SCI. See section 14, Serial Communication Interface
(SCI), for more information. The setting conditions
for bit 2, the transmit end bit (TEND), are changed
as follows.
0: Transmission is in progress.
1: End of transmission.
Note: etu is an abbreviation of elementary time unit,
[Clearing condition]
TDRE is read as 1, then written to with 0.
[Setting conditions]
1. The chip is reset or enters standby mode.
2. TE bit in SCSCR is 0 and the FER/ERS bit is
3. C/A bit in SCSMR is 0, and TDRE = 1 and
4. C/A bit in SCSMR is 1, and TDRE = 1 and
also 0.
FER/ERS = 0 (normal transmission) 2.5 etu
after a one-byte serial character is transmitted.
FER/ERS = 0 (normal transmission) 1.0 etu
after a one-byte serial character is transmitted.
which is the period for the transfer of 1 bit.
Rev. 4.00, 03/04, page 405 of 660