HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 553

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HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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1. Scan mode is selected (MULTI = 1, SCN = 1), channel group 0 is selected (CH2 = 0), analog
2. When A/D conversion of the first channel (AN0) is completed, the result is transferred into
3. Conversion proceeds in the same way through the third channel (AN2).
4. When conversion of all the selected channels (AN0 to AN2) is completed, the ADF flag is set
5. Steps 2 to 4 are repeated as long as the ADST bit remains set to 1. When the ADST bit is
Channel 0 (AN
Channel 1 (AN
Channel 2 (AN
Channel 3 (AN
input channels AN0 to AN2 are selected (CH1 = 1, CH0 = 0), and A/D conversion is started
(ADST = 1).
ADDRA. Next, conversion of the second channel (AN1) starts automatically.
to 1 and conversion of the first channel (AN0) starts again. If the ADIE bit is set to 1, an ADI
interrupt is requested at this time.
cleared to 0, A/D conversion stops. After that, if the ADST bit is set to 1, A/D conversion
starts again from the first channel (AN0).
ADDRC*
ADDRD*
ADDRA*
ADDRB*
operating
operating
operating
operating
ADST
Notes: 1. Downward arrows indicate instruction executed by software.
ADF
0
1
2
3
2
2
2
2
)
)
)
)
2. Data is ignored during conversion.
Figure 19.7 Example of A/D Converter Operation (Scan Mode,
Waiting
Waiting
Waiting
Waiting
A/D conversion 1
Set*
Channels AN0 to AN2 Selected)
1
A/D conversion 2
Transfer
Waiting
Continuous A/D conversion
A/D conversion 3
A/D conversion result 1
Waiting
A/D conversion 4
Rev. 4.00, 03/04, page 507 of 660
A/D conversion 5
A/D conversion result 2
A/D conversion result 3
A/D conversion result 4
Clear*
1
Waiting
Waiting
Waiting
Clear*
1

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