HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 189

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HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Bit
20
19 to 16
15
14
13
Bit Name
BASMB
SCMFCA
SCMFCB
SCMFDA
Initial Value R/W
0
All 0
0
0
0
R/W
R
R/W
R/W
R/W
Description
Break ASID Mask B
Specifies whether the bits of channel B break ASID7
to ASID0 (BASB7 to BASB0) set in BASRB are
masked or not.
0: All BASRB bits are included in break condition,
1: No BASRB bits are included in break condition,
Reserved
These bits are always read as 0. The write value
should always be 0.
CPU Condition Match Flag A
When the CPU bus cycle condition in the break
conditions set for channel A is satisfied, this flag is set
to 1 (not cleared to 0). In order to clear this flag, write
0 into this bit.
0: The CPU cycle condition for channel A does not
1: The CPU cycle condition for channel A matches
CPU Condition Match Flag B
When the CPU bus cycle condition in the break
conditions set for channel B is satisfied, this flag is set
to 1 (not cleared to 0). In order to clear this flag, write
0 into this bit.
0: The CPU cycle condition for channel B does not
1: The CPU cycle condition for channel B matches
DMAC Condition Match Flag A
When the on-chip DMAC bus cycle condition in the
break conditions set for channel A is satisfied, this
flag is set to 1 (not cleared to 0). In order to clear this
flag, write 0 into this bit.
0: The DMAC cycle condition for channel A does not
1: The DMAC cycle condition for channel A matches
ASID is checked
ASID is not checked
match
match
match
Rev. 4.00, 03/04, page 143 of 660

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