HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 463

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HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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The receive margin is found from the following equation:
For smart card mode:
Where:
M
N
D
L
F
Using this equation, the receive margin when F
When D = 0.5 and F = 0:
Absolute value of clock frequency deviation
Frame length (L
Ratio of bit rate to clock (N
Clock duty (D
Receive margin (%)
Base clock
data (RxD)
Synchro-
sampling
sampling
Receive
nization
M
M = (0.5 –
timing
timing
Data
(0.5 – 1/2
Figure 15.8 Receive Data Sampling Timing in Smart Card Mode
0
186 clock cycles
2N
0 to 1.0)
1
10)
)
372)
– (L – 0.5)F –
372 clock cycles
Start
bit
185
100
372)
D – 0.5
49.866
N
371 0
(1 + F)
0 and D
100%
0.5 is as follows:
D0
185
Rev. 4.00, 03/04, page 417 of 660
371 0
D1

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