HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 353

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HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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11.3
11.3.1
The WDT can be used to cancel software standby mode with an NMI or other interrupts. The
procedure is described below. (The WDT does not run when resets are used for canceling, so keep
the RESETP pin or RESETM pin low until the clock stabilizes.)
1. Before transitioning to software standby mode, always clear the TME bit in WTCSR to 0.
2. Set the type of count clock used in the CKS2 to CKS0 bits in WTCSR and the initial values for
3. Move to software standby mode by executing a SLEEP instruction to stop the clock.
4. The WDT starts counting by detecting the edge change of the NMI signal or detecting
5. When the WDT count overflows, the CPG starts supplying the clock and the processor
6. Since the WDT continues counting from H'00, set the STBY bit in the STBCR register to 0 in
11.3.2
To change the frequency used by the PLL, use the WDT. When changing the frequency only by
switching the divider, do not use the WDT.
1. Before changing the frequency, always clear the TME bit in WTCSR to 0. When the TME bit
2. Set the type of count clock used in the CKS2 to CKS0 bits of WTCSR and the initial values for
3. When the frequency control register (FRQCR) is written, the clock stops and the processor
4. When the WDT count overflows, the CPG resumes supplying the clock and the processor
5. The counter stops at the values H'00 to H'01. The stop value depends on the clock ratio.
6. Confirm that the value of WTCNT is H’00 before writing WTCNT, when WTCNT is written
When the TME bit is 1, an erroneous reset or interval timer interrupt may be generated when
the count overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time.
interrupts.
resumes operation. The WOVF flag in WTCSR is not set when this happens.
the interrupt processing program and this will stop the WDT. When the STBY bit remains 1,
the SH7706 again enters the standby mode when the WDT has counted up to H'80. This
standby mode can be canceled by power-on resets.
is 1, an erroneous reset or interval timer interrupt may be generated when the count overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time.
enters standby mode temporarily. The WDT starts counting.
resumes operation. The WOVF flag in WTCSR is not set when this happens.
after the frequency change.
Operation
Canceling Software Standbys
Changing the Frequency
Rev. 4.00, 03/04, page 307 of 660

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