HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 344

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HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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10.4
The CPG includes the following register. Refer to section 23, List of Registers, for more details of
the addresses and access sizes.
10.4.1
The frequency control register (FRQCR) is a 16-bit read/write register used to specify, the
frequency multiplication ratio of PLL circuit 1, and the frequency division ratio of the internal
clock and the peripheral clock. Only word access can be used on the FRQCR register.
The FRQCR register is initialized to H'0102 at a power-on reset by the RESETP pin and retains its
previous value at a manual reset or in standby mode.
Rev. 4.00, 03/04, page 298 of 660
Bit
15
5
4
14
3
2
Frequency control register (FRQCR)
Register Description
Bit Name
STC2
STC1
STC0
IFC2
IFC1
IFC0
Frequency Control Register (FRQCR)
Initial Value R/W
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Frequency Multiplication Ratio
These bits specify the frequency multiplication ratio of
PLL circuit 1.
000:
001:
100:
010:
Other than the above: Reserved (Setting prohibited)
Note: Do not set the output frequency of PLL circuit 1
Internal Clock Frequency Division Ratio
These bits specify the frequency division ratio (Divider
1)of the internal clock with respect to the output
frequency of PLL circuit 1.
000:
001:
100:
010:
Other than the above: Reserved (Setting prohibited)
Note: Do not set the internal clock frequency lower
Description
than the CKIO frequency.
higher than 133 MHz.
1
2
3
4
1
1/2
1/3
1/4

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