MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 108

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MPC8313ECZQADDC

Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313ECZQADDC

Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
Memory Map
Table 2-2
2-4
0x0_000C–
0xC_0000–0xD_FFFF Reserved
0x2_C000–0x2_DFFF Reserved
0xE_0000–0xE_1FFF Reserved
0xE_2000–0xE_2FFF Reserved
0xE_3800–0xE_3FFF Reserved
0xE_4000–0xE_7FFF Reserved
0xE_8000–0xE_FFFF Reserved
0x2_8000–0x2_BFFF Reserved
0x2_E000–0x2_FFFF Reserved
0x8_0000–0xB_FFFF Reserved
0xE_3000–0xE_30FF Reserved
0xE_3100–0xE_31FF Reserved
0xE_3200–0xE_33FF Reserved
0xE_3400–0xE_37FF Reserved
0xF_0000–0xF_FFFF Reserved
0x0_001C
0x2_4000–0x2_4FFF eTSEC 1
0x2_5000–0x2_5FFF eTSEC 2
0x2_6000–0x2_7FFF Reserved
0x3_0000–0x3_FFFF Security engine
0x4_0000–0x7_FFFF Reserved
0x0_0000
0x0_0004
0x0_0008
0x0_0020
Offset
Address
lists the memory-mapped registers.
Internal memory map base address register (IMMRBAR)
Reserved
Alternate configuration base address register (ALTCBAR)
Reserved
eLBC local access window 0 base address register
(LBLAWBAR0)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Table 2-1. IMMR Memory Map (continued)
Register
System Configuration Registers
Table 2-2. Memory Map
Use
Access
R/W
R/W
R/W
3 Kbytes + 1K
3 Kbytes + 1K
Actual Size
52 Kbytes
reserved
reserved
8 Kbytes
0x0000_0000
0xFF40_0000
0x0000_0000
Reset
256 Kbytes
256 Kbytes
128 Kbytes
16 Kbytes
64 Kbytes
16 Kbytes
32 Kbytes
64 Kbytes
256 bytes
256 bytes
512 bytes
Window
4 Kbytes
4 Kbytes
8 Kbytes
8 Kbytes
8 Kbytes
8 Kbytes
4 Kbytes
2 Kbytes
1 Kbyte
1
Freescale Semiconductor
Section/Page
5.2.4.1/5-6
5.2.4.2/5-7
5.2.4.3/5-8

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