MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 606

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

PCI Bus Interface
13.3.2.13 PCI Inbound Extended Base Address Registers (PIEBAR n )
PIEBARn contains fields for defining the high portion of the starting point of the inbound windows in the
PCI memory space.
Table 13-20
13.3.2.14 PCI Inbound Window Attribute Registers (PIWAR n )
PIWARn contains fields for defining the size of an inbound translation window. It also defines some
properties of the window.
Configuration Word Source,”
Table 13-21
13-24
Offset 0x48 (n=2)
Reset
Offset 0x44 (n=2)
Reset
12–31
0–11
Bits
Bits
W
0
1
R
W
R
0x60 (n=1)
0x78 (n=0)
EN
0x5C (n=1)
0
0
shows the bit settings of PIEBARn.
shows the bit settings of PIWARn.
—
1
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Name
Name
EBA
EN
—
—
Figure 13-17. PCI Inbound Extended Base Address Registers (PIEBAR n )
PF
2
Figure 13-17
Figure 13-18. PCI Inbound Window Attribute Registers (PIWAR n )
3
Enable. Used to enable the address translation window.
0 Address translation is disabled for this window.
1 Address translation is enabled for this window. PCI addresses that match the definition of the
Reserved
Reserved
Extended base address. Contains the high portion of the starting address in the PCI memory space
of the inbound base address. This 20-bit field corresponds to bits 63–44 of a 64-bit address.
window will be recognized by the PCI controller and translated to the local memory space.
—
Figure 13-18
for more information on reset configuration.
Table 13-20. PIEBAR n Field Descriptions
—
Table 13-21. PIWAR n Field Descriptions
shows the PIEBARn fields.
shows the PIWARn fields.
11 12
11 12
RTT
All zeros
All zeros
15 16
Description
Description
WTT
SeeSection 4.3.1.1, “Reset
19 20
EBA
—
Freescale Semiconductor
25 26
Access: Read/Write
Access: Read/Write
IWS
31
31