MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 583
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Chapter 13
PCI Bus Interface
The PCI interface is compatible with the PCI Local Bus Specification, Rev. 2.3. It is beyond the scope of
this manual to document the intricacies of PCI. This chapter describes the PCI controller and provides a
basic description of the PCI bus operations. The specific emphasis is directed at how this device
implements the PCI specification. Designers of systems incorporating PCI devices should refer to the
respective specifications for a thorough description of the PCI buses.
13.1
The PCI controller acts as a bridge between the PCI interface and the CSB. The I/O sequencer buffers the
data.
Freescale Semiconductor
Figure 13-1
Introduction
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Much of the available PCI literature refers to a 16-bit quantity as a WORD
and a 32-bit quantity as a DWORD. Because this is inconsistent with the
terminology in this manual, the terms ‘word’ and ‘double word’ are not used
in this chapter. Instead, the number of bits or bytes indicates the exact
quantity.
is a high-level block diagram of the PCI controller.
NOTE
13-1
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