MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 536

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Enhanced Local Bus Controller
slow memory device is delayed by the number of clock cycles specified in the OR
any existing bus turnaround cycle.
10.5
10.5.1
This section provides guidelines for interfacing to peripherals.
10.5.1.1
In this mode, the eLBC is used with port sizes of 8 and 16 bits; address bits A[6:21] will appear on
LAD[0:15] (with zero bits on LAD[16:31]) during address phases, while the lower 10 bits of the address,
A[22:31], are driven permanently on LA[16:25]. The connection is illustrated in
10.5.1.2
For small address space applications the address latch may be eliminated entirely if the local bus address
is taken entirely from LA[0:25], in which case addresses driven onto LAD during address phases are
simply ignored. The connection is illustrated in
remain the same except that few things need not be taken care of like ASHIFT parameter, LAD bus
turnaround time, LALE timings etc.
10-88
Initialization/Application Information
Interfacing to Peripherals in Different Address Modes
Local Bus Interface
Multiplexed Address/Data Bus for 26-Bit Addressing
Non-Multiplexed Address and Data Buses
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Figure 10-69. Multiplexed Address/Data Bus for 26-Bit Addressing
LA[16:25]
LAD[0:15]
LALE
LAD[0:15]
Muxed Address/Data
Unmuxed Address
D
LE
Figure
Latch
Q
10-70. In non-multiplexed mode, waveforms etc
D[15:0]
A[21:6]
A[31:22]
Device
Figure
n
register in addition to
Freescale Semiconductor
10-69.