MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 880

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Enhanced Three-Speed Ethernet Controllers
The user instructs the Tx packet to be timestamped via setting bit 15 in the TxFCB to mark a PTP packet.
TxFCB[VLCTL] can be translated as the Tx PTP packet identification number. BD[TOE] has to be set to
enable transmit PTP packet timestamping. TxFCB[PTP] bit takes precedence over TxFCB[VLN] bit. It
disables per packet VLAN tag insertion. On a PTP packet, VLAN tag can be inserted from the DFVLAN
register. A proposed TxFCB update for the PTP packet is shown in
The contents of the Tx FCB are defined in
15-162
Bytes
0–1
0–1
8–14
Bits
15
0
1
2
3
4
5
6
7
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Name
UDP
CTU
NPH
VLN
TUP
PTP
CIP
IP6
IP
—
Table 15-152. Tx Frame Control Block Description
VLAN control word valid. This bit is ignored when the PTP bit is set. VLAN tag is read from
the DFVLAN register if PTP=1.
0 Ignore VLCTL field.
1 If VLAN tag insertion is enabled for eTSEC, use the VLCTL field as the VLAN control
Layer 3 header is an IP header.
0 Ignore layer 3 and higher headers.
1 Assume that the layer 3 header is an IPv4 or IPv6 header, and take L3OS field as valid.
IP header is IP version 6. Valid only if IP = 1.
0 IP header version is 4.
1 IP header version is 6.
Layer 4 header is a TCP or UDP header.
0 Do not process any layer 4 header.
1 Assume that the layer 4 header is either TCP or UDP (see UDP bit), and offload
UDP protocol at layer 4.
0 Layer 4 protocol is either TCP (if TUP = 1) or undefined.
1 Layer 4 protocol is UDP if TUP = 1.
Checksum IP header enable.
0 Do not generate an IP header checksum.
1 Generate an IPv4 header checksum.
Checksum TCP or UDP header enable.
0 Do not generate a TCP or UDP header checksum. RFC 768 advises that UDP packets
1 Generate a TCP header checksum if IP = 1 and TUP = 1 and UDP = 0.
Disable calculation of TCP or UDP pseudo-header checksum. This bit should be set if IP
options need to be consulted in forming the pseudo-header checksum, as eTSEC does not
examine IP options or extension headers for TCP/IP offload on transmit.
0 Calculate TCP or UDP pseudo-header checksum as normal, assuming that the IP header
1 Do not calculate a TCP or UDP pseudo-header checksum, but instead use the value in
Reserved
Indication to the transmitter that this is a PTP packet. Enabling PTP disables per packet
VLAN tag insertion. Instead, VLAN tag will be read from the DFVLAN when the PTP field is
true.
0 Do not attempt to capture transmission event time
1 Valid PTP_ID field. When this packet is transmitted, capture the time of transmission.
Must be clear if TMR_CTRL[TE] is clear.
word.
checksumming on the basis that the IP header has no extension headers.
not requiring checksum validation should have their checksum field set to zero.
has no options.
field PHCS when determining the overall TCP or UDP checksum.
Table
15-152.
Description
Figure
15-143.
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