MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 836
MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Only one of this register is required for the entire group of eTSECs. Figure 15-110 describes the definition
of the TMR_ADD register.
Table 15-118
15.5.3.10.9 Timer Accumulator Register (TMR_ACC)
Timer accumulator register accumulates the value of the addend register into it. An overflow pulse of the
accumulator is used to increment the timer clock by TMR_CTRL[TCLK_PERIOD]. This register is read
only in normal operation. The register in eTSEC1 is shared for all eTSECs. Figure 15-111 describes the
definition of the TMR_ACC register.
Table 15-119
15.5.3.10.10 Timer Prescale Register (TMR_PRSC)
Timer generated output clock prescale register. It is used to adjust output clock frequency that is put onto
the 1588 clock output signal. The register in eTSEC1 is shared for all eTSECs. Figure 15-112 describes
the definition for the TMR_PRSC register.
15-118
0–31
0–31
Bits
Bits
Offset eTSEC1:0x2_4E20
Offset eTSEC1:0x2_4E24
Reset
Reset
W
W
R
R
TMR_ACC
0
ADDEND
0
Name
Name
describes the fields of the TMR_ADD register fields for the timer.
describes the fields of the TMR_ACC register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
For example,
TimerOsc = 50 MHz
NominalFreq = 40 MHz
FreqDivRatio = 1.25
ADDEND = ceil(2^32/1.25) = 0xCCCC_CCCD
Timer drift compensation addend register value. It is programmed with a value of 2^32/FreqDivRatio.
32-bit timer accumulator register
Table 15-118. TMR_ADD Register Field Descriptions
Table 15-119. TMR_ACC Register Field Descriptions
Figure 15-110. TMR_ADD Register Definition
Figure 15-111. TMR_ACC Register Definition
TMR_ACC
ADDEND
All zeros
All zeros
Description
Description
Access: Read/Write
Access: Read/Write
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