MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 845
MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Table 15-129
Freescale Semiconductor
11–15
Bits
4–6
7–8
10
9
PAUSE
Duplex
Duplex
Name
Pause
0
0
0
0
1
1
1
Local Device
Half
Full
—
—
describes the resolution of pause priority.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
ASM_DIR
Reserved, should be cleared.
The local device’s PAUSE capability is encoded in bits 7 and 8, and the decodes are shown in the following
table. For priority resolution information consult
Half-duplex capability.
0 Designates local device as not capable of half-duplex operation.
1 Designates local device as capable of half-duplex operation.
Full-duplex capability.
0 Designates the local device as not capable of full-duplex operation.
1 Designates the local device as capable of full-duplex operation.
Reserved, should be cleared.
PAUSE bit[8]
0
1
1
1
0
0
1
0
0
1
1
Table 15-128. ANA Field Descriptions (continued)
PAUSE
x
0
1
1
0
1
0
Link Partner
ASM_DIR bit[7]
Table 15-129. PAUSE Priority Resolution
ASM_DIR
0
1
0
1
0
1
0
x
x
x
x
No PAUSE
Asymmetric PAUSE toward link partner
Symmetric PAUSE
Both symmetric PAUSE and
Asymmetric PAUSE toward local device
Disable PAUSE transmit
Disable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Enable PAUSE transmit
Disable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Enable PAUSE transmit
Enable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Local Resolution
Description
Table
15-129.
Capability
Enhanced Three-Speed Ethernet Controllers
Disable PAUSE transmit
Disable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Disable PAUSE transmit
Enable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Enable PAUSE transmit
Enable PAUSE receive
Disable PAUSE transmit
Disable PAUSE receive
Link Partner Resolution
15-127
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