MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 914
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Enhanced Three-Speed Ethernet Controllers
15.7.1.2
Table 15-168
15-196
RGMII Interface Mode
shows the signals configurations required for RGMII interface mode.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
GTX_CLK
RX_CLK
TX_CLK
Signals
Table 15-167. MII Mode Register Initialization Steps (continued)
TX_EN
TX_ER
RX_DV
RxD[0]
RxD[1]
RxD[2]
RxD[3]
TxD[0]
TxD[1]
TxD[2]
TxD[3]
RBASE0–RBASE7[LLLL_LLLL_LLLL_LLLL_LLLL_LLLL_LLLL_L000]
TBASE0–TBASE7[LLLL_LLLL_LLLL_LLLL_LLLL_LLLL_LLLL_L000]
Table 15-168. RGMII Interface Mode Signal Configuration
Initialize (Empty) Receive Descriptor ring and fill with empty buffers
Initialize (Empty) Transmit Descriptor ring and fill buffers with Data
MACCFG1[0000_0000_0000_0000_0000_0000_0000_0101]
DMACTRL[0000_0000_0000_0000_0000_0000_0000_0000]
eTSEC Signals
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Initialize DMACTRL (Optional)
Initialize RBASE0–RBASE7,
Initialize TBASE0–TBASE7,
Enable Transmit Queues
Enable Receive Queues
Signals
No. of
Enable Rx and Tx,
Initialize RQUEUE
Initialize TQUEUE
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(RX_DV/RX_ERR)
(TX_EN/TX_ERR)
RxD[0]/RxD[4]
RxD[1]/RxD[5]
RxD[2]/RxD[6]
RxD[3]/RxD[7]
TxD[0]/TxD[4]
TxD[1]/TxD[5]
TxD[2]/TxD[6]
TxD[3]/TxD[7]
GTX_CLK
RX_CLK
TX_CTL
RX_CTL
Signals
Frequency [MHz] 125
leave unconnected
RGMII Interface
Voltage [V] 2.5
not used
I/O
O
O
O
O
O
O
I
I
I
I
I
I
Signals
No. of
1
1
1
1
1
1
1
1
1
1
1
1
Freescale Semiconductor
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