MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 182

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Reset, Clocking, and Initialization
4.3.2.2.1
The PCIHOST configuration parameter, shown in
or as a PCI agent device. In host mode, the device can immediately master transactions to the PCI interface.
If the device is a PCI agent device, the device is disabled from mastering PCI transactions until the external
host enables it to do so. The external host does this by setting the control registers of the device’s interfaces
appropriately. See details in the PCI programming model described in
Map/Register Definitions.”
4-16
12–13
14–15
16–18
19–21
22–27
30–31
Bits
RCWHR Bit
28
29
0
TSEC1M
TSEC2M
RLEXT
Name
LALE
TLE
—
—
—
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
PCI Host/Agent Configuration
If the device is a PCI agent, and the e300 core is not in holdoff mode (as
described in
(RCWHR)”), the boot ROM should not be located on the PCI interface
because the device is not enabled to master reads onto the PCI bus.
Field Name
PCIHOST
Table 4-11. Reset Configuration Word High Bit Settings (continued)
Boot ROM location extension.
This bit combined with bit ROMLOC determines where the device boots from. See
“Boot ROM Location,”
00 Legacy mode—allows for booting from on-chip peripherals. Refer to
01 NAND Flash mode—allows for booting from NAND flash devices. Refer to
10 Reserved
11 Reserved
Reserved, should be cleared.
TSEC1 mode.
See
TSEC2 mode.
See
Reserved, should be cleared.
True little-endian. See
Local bus LALE signal timing. See
Reserved, should be cleared.
information.
information.
Section 4.3.2.2.5, “eTSEC1 Mode,”
Section 4.3.2.2.6, “eTSEC2 Mode,”
Section 4.3.2.2, “Reset Configuration Word High Register
(Binary)
Value
Table 4-12. PCI Host/Agent Configuration
0
1
The device acts as a PCI agent device.
The device acts as the host processor (default).
for more information.
Section 4.3.2.2.7, “e300 Core True Little-Endian,”
Section 4.3.2.2.8, “LALE Configuration,”
NOTE
Table
for more information.
for more information.
4-12, configures the device to act as a PCI host
Description
Meaning
Section 13.3, “Memory
Table 4-15
for more information.
for more information.
Freescale Semiconductor
Table 4-15
Section 4.3.2.2.4,
for more
for more