MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 977

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

16.5.2
The asynchronous transfer list (based at the ASYNCLISTADDR register) is where all the control and bulk
transfers are managed. Host controllers use this list only when it reaches the end of the periodic list, the
periodic list is disabled, or the periodic list is empty.
The asynchronous list is a simple circular list of queue heads. The ASYNCLISTADDR register is simply
a pointer to the next queue head. This implements a pure round-robin service for all queue heads linked
into the asynchronous list.
16.5.3
Figure 16-38
high-speed isochronous endpoints. All other transfer types should use queue structures. Isochronous TDs
must be aligned on a 32-byte boundary.
Freescale Semiconductor
Asynchronous List Queue Head Pointer
Isochronous (High-Speed) Transfer Descriptor (iTD)
illustrates the format of an isochronous transfer descriptor. This structure is used only for
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
AsyncListAddr
Operational
Registers
Figure 16-37. Asynchronous Schedule Organization
Typ
00
01
10
11
Table 16-39. Typ Field Encodings
Isochronous transfer descriptor
Queue head
Split transaction isochronous transfer descriptor
Frame span traversal node
H
Bulk/Control Queue Heads
Description
Universal Serial Bus Interface
16-49