MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 389

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

8.6.5
In addition to the group relative priority option, SICFR[HPI] can be used to specify one interrupt source
as having the highest priority. This interrupt remains within the same interrupt level as the other interrupt
controller interrupts, but is serviced before any other interrupt in
If the highest priority feature is not used, the IPIC selects the interrupt request in MIXA0 to be the highest
priority interrupt and the standard interrupt priority order is used from
updated dynamically to allow the user to change a normally low priority source into a high priority-source
for a period as needed.
8.6.6
Each of the IPIC’s internal and external interrupt sources can independently assert one interrupt request to
the core.
flexibility exists in the relative ordering of the interrupts, but, in general, relative priorities are as shown.
A single interrupt priority number is associated with each table entry.
Freescale Semiconductor
Table 8-31
Highest Priority Interrupt
Interrupt Source Priorities
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
shows the prioritization of these interrupt sources. As described in previous sections,
Table 8-31. 7Interrupt Source Priority Levels
Priority
12–15
7–10
11
16
17
18
19
20
21
22
23
24
25
26
27
28
29
1
2
3
4
5
6
Interrupt Source Description
MIXA0 (Grouped/Spread)
SYSA0 (Grouped)
SYSA1 (Grouped)
SYSA2 (Grouped)
SYSA3 (Grouped)
SYSA4 (Grouped)
SYSA5 (Grouped)
SYSA6 (Grouped)
SYSA7 (Grouped)
MIXA1 (Grouped)
MIXA2 (Grouped)
MIXA3 (Grouped)
MIXB0 (Grouped)
MIXB1 (Grouped)
MIXB2 (Grouped)
MIXB3 (Grouped)
MIXB0 (Spread)
MIXA1 (Spread)
MIXB1 (Spread)
MIXA2 (Spread)
Reserved
Reserved
Highest
Integrated Programmable Interrupt Controller (IPIC)
Table
Table
8-31.
8-31. SICFR[HPI] can be
8-31