MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 698
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Security Engine (SEC) 2.2
14-56
Bits
56
57
59
60
61
62
63
Names
CDWE Channel done writeback enable
AWSE Always writeback status enable
IWSE
CDIE
NT
—
—
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
ICV writeback status enable
0 No special action.
1 If the descriptor calls for ICV comparison, then at the completion of descriptor processing, write back the
0 No special action.
1 At the completion of processing each descriptor, write back the status of all EUs into the header dword. In
0 Channel done writeback disabled.
1 Channel done writeback enabled. Upon completion of descriptor processing, if the NT bit is set for Global,
Reserved, set to zero
Notification type. This bit controls when the channel will generate channel done notification. Channel done
notification can take the form of an interrupt or modified header writeback or both, depending on the state of
the CDIE and CDWE control bits.
0 Global notification. The channel will generate channel done notification (if enabled) at the end of each
1 Selected notification. The channel will generate channel done notification (if enabled) at the end of every
Channel done interrupt enable
0 Channel done interrupt disabled
1 Channel Done Interrupt enabled. Upon completion of descriptor processing, if the NT bit is set for Global,
Refer to
Reserved, set to zero
status of all EUs into the header dword.
this case, IWSE has no effect.
or if the DN (Done Notification) bit is set in the header word of the descriptor, notify the host by writing back
the descriptor header with the writeback information shown in
memory location of the original descriptor header to determine if that descriptor has been completed.
descriptor.
descriptor with the DONE bit set in the descriptor header.
or if the DN (Done Notification) bit is set in the header word of the descriptor, then notify the host by
asserting an interrupt.
Section 14.5.2, “Channel
Table 14-31. CCCR Field Descriptions (continued)
Interrupts,” for complete description of channel interrupt operation.
Description
Table
14-5. This enables the host to poll the
Freescale Semiconductor
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