MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 813

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.5.3.6.32 Transmit Single Collision Packet Counter (TSCL)
Figure 15-83
Table 15-87
15.5.3.6.33 Transmit Multiple Collision Packet Counter (TMCL)
Figure 15-84
Table 15-88
Freescale Semiconductor
20–31
0–19
Bits
Offset eTSEC1:0x2_46FC; eTSEC2:0x2_56FC
Reset
Offset eTSEC1:0x2_4700; eTSEC2:0x2_5700
Reset
20–31
0–19
Bits
W
W
R
R
Name
TMCL
0
0
—
describes the fields of the TSCL register.
describes the fields of the TMCL register.
Name
TSCL
describes the definition for the TSCL register.
describes the definition for the TMCL register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
—
Figure 15-84. Transmit Multiple Collision Packet Counter Register Definition
Figure 15-83. Transmit Single Collision Packet Counter Register Definition
Reserved
Transmit multiple collision packet counter. Increments for each frame transmitted which experienced 2–15
collisions (including any late collisions) during transmission as defined using the
Half_Duplex[RETRANSMISSION MAXIMUM] field.
Reserved
Transmit single collision packet counter. Increments for each frame transmitted which experienced
exactly one collision during transmission.
Table 15-88. TMCL Field Descriptions
Table 15-87. TSCL Field Descriptions
—
—
All zeros
All zeros
Description
Description
19 20
19 20
Enhanced Three-Speed Ethernet Controllers
TMCL
TSCL
Access: Read/Write
Access: Read/Write
15-95
31
31