MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 1146
MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Serial Peripheral Interface
19.4.1.4
The SPI command register (SPCOM), shown in
Table 19-7
19.4.1.5
SPITD holds the character to be transmitted. The number of bits in each character is specified by
SPMODE[LEN]. Each time SPIE[NF] is set, the core can write another character of data to SPITD, if there
is no error indication in the SPIE. At the end of the frame the core should set SPCOM[LST] and prepare
the last character of data.
Table 19-8
19-14
Offset 0x02C
Offset 0x030
Reset
Reset
10–31
0–31
Bits
Bits
0–8
9
W
W
R
R
0
0
Name
Name
DATA
LST
—
—
describes the SPCOM fields.
shows the field descriptions of the SPI transmit data hold register.
SPI Command Register (SPCOM)
SPI Transmit Data Hold Register (SPITD)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved, should be cleared.
This bit represents the last character. Should be set before the last character is written to the SPITD. This
results in SPIE[LT] being set when the character is fully transmitted and by that gives indication about the
frame being fully transmitted.
0 This character is not the last character of the frame
1 This character is the last character of the frame
Reserved, should be cleared.
These bits are the data to be sent.
—
Figure 19-10. SPI Transmit Data Hold Register Definition
Figure 19-10
Table 19-8. SPI Transmit Data Hold Field Descriptions
Figure 19-9. SPI Command Register Definition
8
Table 19-7. SPCOM Field Descriptions
LST
9
10
shows the SPI transmit data hold register.
Figure
All zeros
All zeros
DATA
Description
Description
19-9, is used to end SPI operation.
—
Freescale Semiconductor
Access: Write only
Access: Write only
31
31
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