MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 821

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.5.3.6.46 Carry Mask Register 1 (CAM1)
While one of the below mask bits are cleared, the corresponding carry bit in CAR1 is allowed to cause
interrupt indications in register IEVENT[MSR0]. These bits all default to a set state.
describes the definition for the CAM1 register.
Table 15-101
Freescale Semiconductor
Offset eTSEC1:0x2_4738; eTSEC2:0x2_5738
Reset
Reset
W
W
R
R
RPK
M1
M1
64
16
1
1
0
describes the fields of the CAM1 register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
RFC
127
M1
M1
17
1
1
1
Bits
0
1
2
3
Figure 15-97. Carry Mask Register 1 (CAM1) Register Definition
Bits
RMC
20
21
22
23
24
25
26
27
28
29
30
31
255
M1
M1
18
1
1
2
Table 15-100. CAR2 Field Descriptions (continued)
M1127
M1255
M1511
RBC
Name
M164
511
M1
M1
19
1
1
3
C2TMC
C2TMA
C2TNC
C2TBC
C2TPF
C2TDF
C2TED
C2TSC
C2TLC
C2TXC
C2TDP
Name
Table 15-101. CAM1 Field Descriptions
—
RXC
M1
M1
1K
20
1
1
4
Mask register 1 TR64 counter carry bit mask
Mask register 1 TR127 counter carry bit mask
Mask register 1 TR255 counter carry bit mask
Mask register 1 TR511 counter carry bit mask
MAX
RXP
M1
M1
21
Carry register 2 TMCA counter carry bit
Carry register 2 TBCA counter carry bit
Carry register 2 TXPF counter carry bit
Carry register 2 TDFR counter carry bit
Carry register 2 TEDF counter carry bit
Carry register 2 TSCL counter carry bit
Carry register 2 TMCL counter carry bit
Carry register 2 TLCL counter carry bit
Carry register 2 TXCL counter carry bit
Carry register 2 TNCL counter carry bit
Reserved, should be cleared
Carry register 2 TDRP counter carry bit
1
1
5
MGV
RXU
M1
M1
22
6
1
1
RAL
M1
23
0
1
7
Description
RFL
Description
M1
24
0
1
RCD
M1
25
0
1
RCS
Enhanced Three-Speed Ethernet Controllers
M1
—
26
0
1
RUN
M1
27
0
1
ROV
M1
28
0
1
Figure 15-97
Access: Read/Write
RFR
M1
13
29
0
1
REJ
RJB
M1
M1
14
30
1
1
RDR
RBY
15-103
M1
M1
15
31
1
1