HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 157

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
6.2.6
CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals
(CS
If output of a chip select signal is enabled by a setting in this register, the corresponding pin
functions as a chip select signal (CS
be modified in single-chip mode.
CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 4—Chip Select 7 to 4 Enable (CS7E to CS4E): These bits enable or disable output of
the corresponding chip select signal.
Bit n
CSnE
0
1
Note: n = 7 to 4
Bits 3 to 0—Reserved: These bits cannot be modified and are always read as 1.
Rev. 2.0, 06/04, page 128 of 980
Bit
Initial value
Read/Write
7
to CS
Chip Select Control Register (CSCR)
4
).
CS7E
R/W
7
0
Description
Output of chip select signal CSn is disabled
Output of chip select signal CSn is enabled
CS6E
R/W
Chip select 7 to 4 enable
These bits enable or disable
chip select signal output
6
0
7
to CS
CS5E
R/W
5
0
4
) output regardless of any other settings. CSCR cannot
CS4E
R/W
4
0
3
1
Reserved bits
2
1
1
1
(Initial value)
0
1

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