HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 376

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
External
clock input
16TCNT input
clock
16TCNT
Internal
clock
16TCNT input
clock
16TCNT
Figure 9.16 Count Timing for External Clock Sources (when Both Edges are Detected)
16TCNT count timing
Internal clock source
Bits TPSC2 to TPSC0 in 16TCR select the system clock ( ) or one of three internal clock
sources obtained by prescaling the system clock ( /2, /4, /8).
Figure 9.15 shows the timing.
External clock source
The external clock pin (TCLKA to TCLKD) can be selected by bits TPSC2 to TPSC0 in
16TCR, and the detected edge by bits CKEG1 and CKEG0. The rising edge, falling edge,
or both edges can be selected.
The pulse width of the external clock signal must be at least 1.5 system clocks when a
single edge is selected, and at least 2.5 system clocks when both edges are selected. Shorter
pulses will not be counted correctly.
Figure 9.16 shows the timing when both edges are detected.
N – 1
Figure 9.15 Count Timing for Internal Clock Sources
N – 1
N
N
Rev. 2.0, 06/04, page 347 of 980
N + 1
N + 1

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