HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 897

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

DTCR0B—Data Transfer Control Register 0B (cont)
Rev. 2.0, 06/04, page 868 of 980
Initial value
Read/Write
Full address mode
Bit
Data transfer master enable
0
1
Destination address increment/decrement (bit 5)
Destination address increment/decrement enable (bit 4)
DAID
Bit 5
Data transfer is disabled
Data transfer is enabled
DTME
0
1
R/W
7
0
DAIDE
Bit 4
0
1
0
1
R/W
MARB is held fixed
Incremented: If DTSZ = 0, MARB is incremented by 1 after each transfer
MARB is held fixed
Decremented: If DTSZ = 0, MARB is decremented by 1 after each transfer
6
0
DAID
R/W
5
0
Increment/Decrement Enable
If DTSZ = 1, MARB is incremented by 2 after each transfer
If DTSZ = 1, MARB is decremented by 2 after each transfer
DAIDE
R/W
4
0
Transfer mode select
TMS
R/W
0
1
3
0
Destination is the block area in block transfer mode
Source is the block area in block transfer mode
DTS2B
Data transfer select 2B to 0B
Bit 2
0
1
DTS2B
DTS1B
R/W
Bit 1
2
0
0
1
0
1
DTS0B
Bit 0
0
1
0
1
0
1
0
1
DTS1B
R/W
1
0
Auto-request
(burst mode)
Not available
Auto-request
(cycle-steal mode)
Not available
Not available
Not available
Falling edge input of
,4-3
Low level input at
H'FFF2F
Normal Mode
DTS0B
R/W
Data Transfer Activation Source
0
0
,4-3
Compare match/input
capture A interrupt from
16-bit timer channel 0
Compare match/input
capture A interrupt from
16-bit timer channel 1
Compare match/input
capture A interrupt from
16-bit timer channel 2
A/D converter conversion
end interrupt
Not available
Not available
Falling edge input of
,4-3
Not available
Block Transfer Mode
DMAC0