HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 708

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
(7) Switching of the MATs by FMATS should be needed when programming/erasing of the user
(8) When the data storable area indicated by programming parameter FMPDR is within the flash
In consideration of these conditions, there are three factors; operating mode, the bank structure of
the user MAT, and operations.
The areas in which the programming data can be stored for execution are shown in table 18.27.
Table 18.27 Executable MAT
Operation
Programming
Erasing
Note:
Transitions to the reset state, and hardware standby mode are inhibited during
programming/erasing. When the reset signal is accidentally input to the chip, a longer period
in the reset state than usual (100 s) is needed before the reset signal is released.
boot MAT is operated in user-boot mode. The program which switches the MATs should be
executed from the on-chip RAM. See section 18.8, Switching between User MAT and User
Boot MAT. Please make sure you know which MAT is selected when switching between
them.
memory area, an error will occur even when the data stored is normal. Therefore, the data
should be transferred to the on-chip RAM to place the address that FMPDR indicates in an
area other than the flash memory.
* Programming/Erasing is possible to user MATs.
Initiated Mode
User Program Mode
Table 18.28 (1)
Table 18.28 (2)
Rev. 2.0, 06/04, page 679 of 980
User Boot Mode*
Table 18.28 (3)
Table 18.28 (4)

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