HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 336

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Table 8.23 Port B Pin Functions (Modes 1 to 5)
Pin
PB
RxD
PB
TxD
PB
SCK
PB
UCAS
7
6
5
4
/TP
/TP
/TP
/TP
2
2
2
/LCAS
15
14
13
12
/
/
/
/
Pin Functions and Selection Method
Bit RE in SCR of SCI2, bit SMIF in SCMR, bit NDER15 in NDERB, and bit PB
follows.
SMIF
RE
PB
NDER15
Pin function
Bit TE in SCR of SCI2, bit SMIF in SCMR, bit NDER14 in NDERB, and bit PB
follows.
SMIF
TE
PB
NDER14
Pin function
Note: * Functions as the TxD
Bit C/A in SMR of SCI2, bits CKE0 and CKE1 in SCR, bit NDER13 in NDERB, and bit PB
function as follows.
CKE1
C/A
CKE0
PB
NDER13
Pin function
Note: * LCAS output depending on bits DRAS2 to DRAS0 in DRCRA and bit CSEL in DRCRB, and
Bit NDER12 in NDERB and bit PB
PB
NDER12
Pin function
Note: * UCAS output depending on bits DRAS2 to DRAS0 in DRCRA and bit CSEL in DRCRB, and
7
6
5
4
DDR
DDR
DDR
DDR
in which the pin is at high-impedance.
regardless of bits C/A, CKE0 and CKE1, NDER13, and PB
Controller
regardless of bits NDER12 and PB
.
PB
PB
PB
2
5
0
output pin, but there are two states: one in which the pin is driven, and another
input
7
6
0
0
input
input
4
PB
DDR select the pin function as follows.
4
0
input
PB
4
5
DDR. For details, see section 6, Bus Controller.
PB
PB
output
0
1
0
7
6
output
output
0
1
0
0
1
0
0
TP
13
0
0
1
1
output
0
UCAS output*
LCAS output*
TP
TP
PB
15
14
4
output
1
1
output
1
1
output
1
0
5
DDR. For details, see section 6, Bus
SCK
Rev. 2.0, 06/04, page 307 of 980
2
1
output SCK
6
7
DDR select the pin function as
DDR select the pin function as
TxD
RxD
2
2
1
1
output
input
2
1
5
output
DDR select the pin
TP
12
output
TxD
1
1
RxD
SCK
2
output*
2
1
1
input
2
1
input

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