HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 381

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.4.3
The synchronization function enables two or more timer counters to be synchronized by writing
the same data to them simultaneously (synchronous preset). With appropriate 16TCR settings, two
or more timer counters can also be cleared simultaneously (synchronous clear). Synchronization
enables additional general registers to be associated with a single time base. Synchronization can
be selected for all channels (0 to 2).
Sample Setup Procedure for Synchronization: Figure 9.24 shows a sample procedure for
setting up synchronization.
Rev. 2.0, 06/04, page 352 of 980
Input capture signal timing
Input capture on the rising edge, falling edge, or both edges can be selected by settings in
TIOR. Figure 9.23 shows the timing when the rising edge is selected. The pulse width of the
input capture signal must be at least 1.5 system clocks for single-edge capture, and 2.5 system
clocks for capture of both edges.
Input-capture input
Input capture signal
16TCNT
GRA, GRB
Synchronization
Figure 9.23 Input Capture Signal Timing
N
N