HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 354

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.2.4
TISRA is an 8-bit readable/writable register that indicates GRA compare match or input capture
and enables or disables GRA compare match and input capture interrupt requests.
TISRA is initialized to H'88 by a reset and in standby mode.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Bit 6—Input Capture/Compare Match Interrupt Enable A2 (IMIEA2): Enables or disables
the interrupt requested by the IMFA2 when IMFA2 flag is set to 1.
Bit 6
IMIEA2
0
1
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flag.
Timer Interrupt Status Register A (TISRA)
Description
IMIA2 interrupt requested by IMFA2 flag is disabled
IMIA2 interrupt requested by IMFA2 flag is enabled
Bit
Reserved bit
—
—
7
1
IMIEA2
R/W
6
0
Input capture/compare match interrupt enable A2 to A0
These bits enable or disable interrupts by the IMFA flags
IMIEA1
R/W
5
0
IMIEA0
R/W
4
0
Reserved bit
—
—
3
1
R/(W)*
IMFA2
Input capture/compare match
flags A2 to A0
Status flags indicating GRA
compare match or input capture
Rev. 2.0, 06/04, page 325 of 980
2
0
R/(W)*
IMFA1
1
0
R/(W)*
IMFA0
(Initial value)
0
0