HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 331

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Pin
PA
TCLKB/
TEND
PA
TCLKA/
TEND
Rev. 2.0, 06/04, page 302 of 980
1
0
/TP
/TP
1
0
1
0
/
/
Pin Functions and Selection Method
Bit MDF in TMDR, bits TPSC2 to TPSC0 in 16TCR2 to 16TCR0 of the 16-bit timer, bits CKS2 to CKS0 in
8TCR3 of the 8-bit timer, bit NDER1 in NDERA, and bit PA
PA
NDER1
Pin function
Notes:
8-bit timer channel 3
settings
CKS2
CKS1
CKS0
Bit MDF in TMDR, bits TPSC2 to TPSC0 in 16TCR2 to 16TCR0 of the 16-bit timer, bits CKS2 to CKS0 in
8TCR1 of the 8-bit timer, bit NDER0 in NDERA, and bit PA
PA
NDER0
Pin function
Notes:
8-bit timer channel 1
settings
CKS2
CKS1
CKS0
1
0
DDR
DDR
*1 TCLKB input when MDF = 1 in TMDR, or TPSC2 = 1, TPSC1 = 0, and TPSC0 = 1 in any of
*2 When an external request is specified as a DMAC activation source, TEND
*1 TCLKA input when MDF = 1 in TMDR, or TPSC2 = 1, TPSC1 = 0 and TPSC0 = 0 in any of
*2 When an external request is specified as a DMAC activation source, TEND
16TCR2 to 16TCR0, or bits CKS2 to CKS0 in 8TCR3 are as shown in (1) in the table below.
bits PA
16TCR2 to 16TCR0, or bits CKS2 to CKS0 in 8TCR0 are as shown in (1) in the table below.
bits PA
1
0
DDR and NDER1.
DDR and NDER0.
0
0
PA
PA
1
0
0
0
input
input
(2)
(2)
0
0
0
0
1
0
DDR select the pin function as follows.
DDR select the pin function as follows.
TCLKB output*
TCLKA output*
TEND
TEND
PA
PA
1
0
1
0
output
output
1
1
1
0
0
output*
output*
2
2
1
1
1
1
1
(1)
(1)
1
0
output regardless of
output regardless of
TP
TP
1
1
1
0
output
output
1
1
1

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