HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 301

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
Bits 7 to 4 are reserved. They are fixed at 1, and cannot be modified.
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P5DDR values are fixed at 1.
Port 5 functions as an address bus.
Mode 5 (Expanded Mode with On-Chip ROM Enabled): Following a reset, port 5 is an input
port. A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set to 1,
and an input port if this bit is cleared to 0.
Mode 7 (Single-Chip Mode): Port 5 functions as an input/output port. A pin in port 5 becomes an
output port if the corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
In modes 1 to 4, P5DDR bits are always read as 1, and cannot be modified.
In modes 5 and 7, P5DDR is a write-only register. Its value cannot be read. All bits return 1 when
read.
P5DDR is initialized to H'FF in modes 1 to 4, and to H'F0 in modes 5 and 7, by a reset and in
hardware standby mode. In software standby mode it retains its previous setting. Therefore, if a
transition is made to software standby mode while port 5 is functioning as an input/output port
and a P5DDR bit is set to 1, the corresponding pin maintains its output state.
Rev. 2.0, 06/04, page 272 of 980
Bit
Modes
1 to 4
Modes
5 and 7
Initial value
Read/Write
Initial value
Read/Write
—
—
—
7
1
1
Reserved bits
—
—
—
6
1
1
—
—
—
5
1
1
—
—
—
4
1
1
P5 DDR
3
—
W
3
1
0
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
P5 DDR
2
—
W
2
1
0
P5 DDR
1
—
W
1
1
0
P5 DDR
0
—
W
0
1
0