HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 344

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
9.1.2
16-bit timer Block Diagram (Overall): Figure 9.1 is a block diagram of the 16-bit timer.
TCLKA to TCLKD
TIOCA
TIOCB
Legend:
TSTR: Timer start register (8 bits)
TSNR: Timer synchro register (8 bits)
TMDR: Timer mode register (8 bits)
TOLR: Timer output level setting register (8 bits)
TISRA: Timer interrupt status register A (8 bits)
TISRB: Timer interrupt status register B (8 bits)
TISRC: Timer interrupt status register C (8 bits)
, /2, /4, /8
0
0
Block Diagrams
to TIOCA
to TIOCB
2
2
Figure 9.1 16-bit timer Block Diagram (Overall)
Clock selector
Control logic
Module data bus
Rev. 2.0, 06/04, page 315 of 980
TISRA
TISRB
TISRC
TMDR
TSNR
TSTR
TOLR
IMIA0 to IMIA2
IMIB0 to IMIB2
OVI0 to OVI2

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