HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 285

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 8.1
Port
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Note:
Rev. 2.0, 06/04, page 256 of 980
Description
8-bit I/O port
Can drive
LEDs
8-bit I/O port
Built-in input
pull-up
transistors
Can drive
LEDs
8-bit I/O port
8-bit I/O port
Built-in input pull-
up transistors
4-bit I/O port
Built-in input pull-
up transistors
Can drive LEDs
7-bit I/O port and
1-bit input port
8-bit input port
5-bit I/O port
P8
Schmitt inputs
* P8
2
to P8
0
Port Functions
have
1
can be used as an output port by making a setting in DRCRA.
Pins
P1
A
P2
A
P3
D
P4
D
P5
A
P6
P6
P6
P6
P6
P6
P6
P6
P7
P7
P7
AN
P8
P8
CS
P8
P8
P8
/RFSH
7
15
19
15
7
7
to A
7
7
7
3
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
to D
5
1
to A
to A
/
/LWR
/HWR
/RD
/AS
/BACK
/BREQ
/WAIT
/AN
/AN
/CS
/IRQ
/IRQ
/IRQ
/IRQ
to D
/ADTRG
to P1
to P2
to P3
to P4
to P5
to P7
to AN
0
0
7
6
0
8
16
8
/DA
/DA
3
2
1
0
/
/CS
/CS
0
0
0
0
0
0
/
/
/
/
/
/
0
1
0
2
3
Mode 1
Address output pins (A
Address output pins (A
Data input/output (D
Data input/output (D
8-bit bus mode: generic input/output
16-bit bus mode: data input/output
Address output (A
Clock output ( ) and generic input
Bus control signal output (LWR, HWR, RD, AS)
Bus control signal input/output (BACK, BREQ, WAIT) and
3-bit generic input/output
Analog input (AN
from D/A converter, and generic input
Analog input (AN
DDR = 0: generic input
DDR = 1 (reset value): CS
IRQ
and generic input
DDR = 0 (after reset): generic input
DDR = 1: CS
IRQ
DDR = 0 (reset value): generic input
DDR = 1: CS
IRQ
3
2
0
input, CS
and IRQ
input, RFSH output, and generic input/output
1
2
Mode 2
1
output
and CS
1
input, CS
output, external trigger input (ADTRG) to A/D converter,
7
5
, AN
19
to AN
to A
15
7
to D
3
6
to D
) to A/D converter, analog output (DA
7
15
output
to A
16
0
2
) to A/D converter, and generic input
to A
)
and CS
0
8
) and 8-bit generic input/output
0
Mode 3
)
output
0
Expanded Modes
)
8
)
3
output, and generic input*
Mode 4 Mode 5
Address output (A
A
DDR = 0:
generic input
DDR = 1:
address output
Address output (A
A
DDR = 0:
generic input
DDR = 1:
address output
Address output (A
A
generic input
DDR = 0: generic input
DDR = 1: address output
DDR = 0 (reset value):
generic input
DDR = 1: CS
0
8
16
) and generic input
) and generic input
) and 4-bit
1
, DA
0
output
0
)
7
15
19
to
to
to
Mode 7
Generic input/output
Generic input/output
Generic input/output
Generic input/output
Generic input/output
Generic input/output
Generic input/output
IRQ
trigger input (ADTRG) to
A/D converter, and
generic input/output
IRQ
generic input/output
IRQ
input/output
Single-Chip Modes
3
2
0
input and generic
input, external
and IRQ
1
input and