HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 740

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
MSTCR Access from DMAC Disabled: To prevent malfunctions, MSTCR can only be accessed
from the CPU. It can be read by the DMAC, but it cannot be written by the DMAC.
20.7
Output of the system clock ( ) can be controlled by the PSTOP bit in MSTCRH. When the
PSTOP bit is set to 1, output of the system clock halts and the pin is placed in the high-
impedance state. Figure 20.4 shows the timing of the stopping and starting of system clock output.
When the PSTOP bit is cleared to 0, output of the system clock is enabled. Table 20.4 indicates
the state of the pin in various operating states.
Table 20.4
Operating State
Hardware standby
Software standby
Sleep mode
Normal operation
pin
System Clock Output Disabling Function
Pin State in Various Operating States
MSTCRH write cycle
Figure 20.4 Starting and Stopping of System Clock Output
T1
(PSTOP = 1)
T2
T3
PSTOP = 0
High impedance
Always high
System clock output
System clock output
High impedance
Rev. 2.0, 06/04, page 711 of 980
MSTCRH write cycle
High impedance
PSTOP = 1
High impedance
High impedance
High impedance
T1
(PSTOP = 0)
T2
T3

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