HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 475

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Bits 2 to 0—Clock Select 2 to 0 (CKS2/1/0): These bits select one of eight internal clock
sources, obtained by prescaling the system clock ( ), for input to TCNT.
12.2.3
RSTCSR is an 8-bit readable and writable register that indicates when a reset signal has been
generated by watchdog timer overflow, and controls external output of the reset signal.
Bits 7 and 6 are initialized by input of a reset signal at the RES pin. They are not initialized by
reset signals generated by watchdog timer overflow.
Rev. 2.0, 06/04, page 446 of 980
Bit 2
CKS2
0
1
Bit
Initial value
Read/Write
Notes: RSTCSR is write-protected by a password. For details see section 12.2.4, Notes on
Reset Control/Status Register (RSTCSR)
Bit 1
CKS1
0
1
0
1
Register Access.
* Only 0 can be written in bit 7, to clear the flag.
Watchdog timer reset
Indicates that a reset signal has been generated
R/(W)*
WRST
1
Bit 0
CKS0
0
1
0
1
0
1
0
7
0
R/W
Description
/2
6
0
/4096
/32
/64
/128
/256
/512
/2048
5
1
Reserved bits
4
1
3
1
2
1
1
1
(Initial value)
0
1

Related parts for HD64F3029XBL25V