HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 428

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timing of Overflow Flag (OVF) Setting: The OVF flag in 8TCSR is set to 1 by the overflow
signal generated when 8TCNT overflows (from H'FF to H'00). Figure 10.16 shows the timing in
this case.
10.4.5
If bits CKS2 to CKS0 are set to (100) in either 8TCR0 or 8TCR1, the 8-bit timers of channels 0
and 1 are cascaded. With this configuration, the two timers can be used as a single 16-bit timer
(16-bit timer mode), or channel 0 8-bit timer compare matches can be counted in channel 1
(compare match count mode). Similarly, if bits CKS2 to CKS0 are set to (100) in either 8TCR2
or 8TCR3, the 8-bit timers of channels 2 and 3 are cascaded. With this configuration, the two
timers can be used as a single 16-bit timer (16-bit timer mode),or channel 2 8-bit timer compare
matches can be counted in channel 3 (compare match count mode). In this case, the timer
operates as below.
Input capture signal
Operation with Cascaded Connection
Figure 10.15 CMFB Flag Setting Timing when Input Capture Occurs
TCORB
Overflow signal
8TCNT
CMFB
8TCNT
OVF
Figure 10.16 Timing of OVF Setting
H'FF
N
H'00
Rev. 2.0, 06/04, page 399 of 980
N