HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 922

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8TCR2—Timer Control Register 2
8TCR3—Timer Control Register 3
Initial value
Read/Write
Bit
CMIEB
Compare match interrupt enable B
R/W
0
1
7
0
CMIB interrupt requested by CMFB is disabled
CMIB interrupt requested by CMFB is enabled
CMIEA
Compare match interrupt enable A
R/W
0
1
6
0
CMIA interrupt requested by CMFA is disabled
CMIA interrupt requested by CMFA is enabled
Timer overflow interrupt enable
OVIE
R/W
0
1
5
0
OVI interrupt requested by OVF is disabled
OVI interrupt requested by OVF is enabled
Counter clear 1 and 0
CCLR1
0
1
R/W
4
0
0
1
0
1
Clock select 2 to 0
Note: * If the clock input of channel 2 is the TCNT3 overflow
CSK2 CSK1 CSK0
CCLR0
Clearing is disabled
Cleared by compare match A
Cleared by compare match B/input capture B
Cleared by input capture B
0
1
R/W
3
0
signal and that of channel 3 is the TCNT2 compare
match signal, no incrementing clock is generated. Do
not use this setting.
0
1
0
1
CKS2
R/W
2
0
0
1
0
1
0
1
0
1
H'FFF90
H'FFF91
Internal clock, counted on rising edge
of /8
Internal clock, counted on rising edge
of /64
Internal clock, counted on rising edge
of /8192
Channel 2:
Channel 3:
External clock, counted on falling edge
External clock, counted on rising edge
External clock, counted on both
rising and falling edges
Clock input is disabled
Count on TCNT3 overflow signal*
Count on TCNT2 compare match A*
CKS1
R/W
Rev. 2.0, 06/04, page 893 of 980
1
0
Description
CKS0
R/W
0
0
8-bit timer channel 2
8-bit timer channel 3