HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 554

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.3.2
Figure 14.2 shows a pin connection diagram for the smart card interface.
In communication with a smart card, since both transmission and reception are carried out on a
single data transmission line, the TxD pin and RxD pin should both be connected to this line. The
data transmission line should be pulled up to V
When the smart card uses the clock generated on the smart card interface, the SCK pin output is
input to the CLK pin of the smart card. If the smart card uses an internal clock, this connection is
unnecessary.
The reset signal should be output from one of the H8/3029’s generic ports.
In addition to these pin connections, power and ground connections will normally also be
necessary.
Note: A loop-back test can be performed by setting both RE and TE to 1 without connecting a
In transmission, a guard time of at least 2 etu (elementary time units: the time for transfer of
one bit) is provided between the end of the parity bit and the start of the next frame.
If a parity error is detected during reception, a low error signal level is output for a1 etu period
10.5 etu after the start bit.
If an error signal is detected during transmission, the same data is transmitted automatically
after the elapse of 2 etu or longer.
Only asynchronous communication is supported; there is no synchronous communication
function.
smart card.
Pin Connections
Card-processing device
Figure 14.2 Smart Card Interface Connection Diagram
H8/3029
chip
TxD
RxD
SCK
Px (port)
CC
with a resistor.
Data line
Clock line
Reset line
V
CC
Rev. 2.0, 06/04, page 525 of 980
I/O
CLK
RST
Smart card