tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 110

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Exceptions/Interrupts
IMCGE
(Note 1)
(Note 2)
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
Refer to EMSTxx bit to know the active condition which is used for clearing
standby.
Please specify the bit for the edge first and then specify the bit for the
<INTxEN>. Setting them simultaneously is prohibited.
“0” is read. Active state setting of
“0” is read. Active state setting of
“0” is read. Active state setting of
“0” is read. Active state setting of
15
23
31
R
R
R
R
7
0
0
0
0
Set it as shown below.
Set it as shown below.
Set it as shown below.
Set it as shown below.
standby clear request.
standby clear request.
standby clear request.
standby clear request.
011: Rising edge
011: Rising edge
011: Rising edge
011: Rising edge
EMCG1
EMCG1
EMCG1
EMCG1
14
22
30
02
12
22
32
6
0
0
0
0
TMP19A44(rev1.3) 6-60
EMCG1
EMCG1
EMCG1
EMCG1
R/W
R/W
R/W
R/W
13
21
29
01
11
21
31
5
1
1
1
1
PHCNT2
PHCNT3
PHCNT4
PHCNT5
EMCG1
EMCG1
EMCG1
EMCG1
12
20
28
00
10
20
30
4
0
0
0
0
read.
Undefined value is
Undefined value is
read.
Undefined value is
read.
Undefined value is
read.
11
19
27
3
-
-
-
-
R
R
R
R
10
18
26
2
-
-
-
-
TMP19A44
“0” is read. PHCNT2
“0” is read. PHCNT3
“0” is read. PHCNT4
“0” is read. PHCNT5
17
25
1
R
9
R
R
R
0
0
0
0
2010-04-01
clear input
0: Disable
1: Enable
clear input
0: Disable
1: Enable
clear input
0: Disable
1: Enable
clear input
0: Disable
1: Enable
PHCNT3
EN
PHCNT2
PHCNT4
PHCNT5
EN
R/W
R/W
EN
R/W
EN
R/W
16
24
0
8
0
0
0
0