tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 467

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Overwriting 10 with 01 allows ADC registers excluding the ADCLK<ADCLK2:0>bit to be reset by software.
(Note 1) If AD conversion is executed with the match triggers <ADHTG> and <HADHTG> of a 16-bit
(Note 2) Do not make a top-priority AD conversion setting and a normal AD conversion setting
(Note 3) The external trigger cannot be used for H/W activation of AD conversion when it is used for
Analog/Digital Converter
ADCMOD4
(0xFF00_4E44)
timer set to "1" by using a source for triggering H/W, A/D conversion can be activated at
specified intervals by performing three steps shown below when the timer is idle:
simultaneously.
H/W activation of top priority AD conversion.
Select a source for triggering HW: <ADHS>, <HADHS>
Enable H/W activation of AD conversion: <ADHTG>, <HADHTG>
Start the timer.
bit Symbol
Read/Write
After reset
Function
<REGS2, 1, 0>
HW source for
activating
top-priority
A/D
conversion
0: External
1: TB9RG0
HADHS
TRG
7
0
1XXX
0000
0001
0010
0011
0100
0101
0110
0111
HW for
activating
top-priority
A/D
conversion
0: Disable
1: Enable
HADHTG
6
0
TMP19A44(rev1.3) 17-8
A/D Mode Control Register 3
A/D Mode Control Register 4
R/W
HW source for
activating
normal A/D
conversion
0: External
1: TB1RG0
TRG
ADHS
5
0
AD conversion result storage register
HW for
activating
normal A/D
conversion
0: Disable
1: Enable
ADHTG
to be compared
4
0
ADAREGSP
ADCREG0
ADCREG1
ADCREG2
ADCREG3
ADCREG4
ADCREG5
ADCREG6
ADCREG7
“0” is read.
3
R
0
2
TMP19A44
Overwriting 10 with 01 allows
ADC to be software reset.
ADRST1
W
1
−
2010-04-01
ADRST0
W
0
−