tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 152

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Input/Output Ports
7.2 Port 1 (P10 through P17)
The port 1 is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can be specified in units
of bits by using the control register P1CR and the function registers P1FC1 and P1FC2. A reset allows all bits of
the output latch P1, P1CR and P1FC to be cleared to "0" and the port 1 to be put in input mode.
Besides the general-purpose input/output function, the port 1 performs other functions: D8 through D15 function
as a data bus, AD8 through AD15 function as an address data bus, and A8 through A15 function as an address
bus. To access external memory, registers P1CR and P1FC must be provisioned to allow the port 1 to function as
either an address bus or an address data bus.
If the BUSMD pin (port 45) is set to "L" level during a reset, the port 1 is put in separate bus mode (D8 to D15).
If it is set to "H" level during a reset, the port 1 is put in multiplexed mode (AD8 to AD15 or A8 to A15).
Drive disabled
during STOP/RESET
(output latch)
(direction
P1PUP
P1FC1
(function
P1FC2
(function
(Pull-up
P1CR
control)
control)
control)
control)
P1 read
P1
Address/ data
Output enable
A8~
A15
1
0
External bus opening
Fig. 7.2 Port 1 (P10 through P17)
TMP19A44 (rev1.3) 7-4
D8~
D15
0
1
1
0
1
0
External read
P1 read
PORT KEEP
TMP19A44
Port 1
P10~P17
(D8~D15)
(AD8~AD15/A8~A15)
2010-04-01
RESET