tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 38

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tmp19a44fda

Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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(0xFF00_1910)
<Bit 0><SYSCKFLG>
<Bit 1><SYSCK>
Clock/Standby Control
CKSEL
5.3.5
Read/Write
Read/Write
Read/Write
Read/Write
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
System Clock Select Register
Function
Function
Function
Function
15
23
31
7
0
0
0
0
: Enables to select system clock.
: Indicates status when system clock is switched.
To make the <SYSCK> setting for switching oscillator valid, there is a time lag. If
<SYSCLKFLG> recognizes the oscillator specified in <SYSCK>, the switching is
completed.
To change <SYSCK> setting, set <XEN> and <XTEN> of the OSCCR1 register
to “1” beforehand.
14
22
30
6
0
0
0
0
TMP19A44(rev1.3) 5-9
This can be read as “0”.
13
21
29
5
0
0
0
0
R
This can be read as “0”.
This can be read as “0”.
This can be read as “0”.
12
20
28
4
0
0
0
0
R
R
R
19
27
11
3
0
0
0
0
18
26
10
2
0
0
0
0
TMP19A44
Select
system clock
0:
High-speed
(fc)
1: Low-speed
(fs)
SYSCK
R/W
17
25
1
0
9
0
0
0
2010-04-01
System
clock status
flag
0:
High-speed
(fc)
1:
Low-speed
(fs)
(stable
identical
<SYSCK>)
SYSCKFLG
16
24
R
0
0
8
0
0
0
and
to

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