tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 258

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

TMP19A44
To specify a space of 1 MB starting at 0x1FD0_0000 in the CS2 space, the base and mask address
registers must be programmed as shown below.
31
16 15
0
BA2
MA2
0 0 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
1
F
D
0
0
0
1
F
Values to be set in the base and mask address registers (BMA2)
In the base address (BA2), specify "0x1FD0" that corresponds to higher 16 bits of a start address, while
in the mask address (MA2), specify whether a comparison of addresses in the space A30 through A15 is
to be made or not. A comparison of A31 will definitely be made and to ensure a comparison of A30
through A20, set bits 15 to 5 of the mask address (MA2) to "0."
This setting allows A31 through A20 to be compared with the value specified as a start address. As A19
through A0 are masked, a space of 1 MB from 0x1FD0_0000 to 0x1FDF_FFFF is designated as a CS2
space.
After a reset, the CS0 through CS3 spaces are disabled, while the whole CS2 space (4 GB) is enabled as
an address space.
The Chip Selector and Wait Controller TMP19A44 (rev1.3) 9-5
2010-04-01