tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 311

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

TBnMOD
(0xFF00_4xx4)
＜TBnCLK1:0＞：Clears and controls the TMRBn up-counter.
＜TBnCLE＞:Disables clearing of the up-counter.
＜TBnCPM1:0＞:Specifies TMRBn capture timing.
＜TBnCP0＞:Captures count values by software and takes them into capture register 0 (TBnCP0).
(Note)
16-bit Timer/Event Counters (TMRBs)
(TMRB1 through TMRB7：TB0OUT, TMRB9 through F:TB8OUT and TMRB11：TB10OUT).
bit Symbol
Read/Write
After reset
Read/Write
Read/Write
Read/Write
bit Symbol
After reset
bit Symbol
After reset
bit Symbol
After reset
“0”: Disables clearing of the up-counter.
“1”: Clears up-counter if there is a match with timer register 1 (TBnRG1).
“00”: Capture disable
"01":
"10":
“11”:Takes count values into capture register 0 (TBnCP0) upon the rising of 16-bit timer match
output (TB3OUT) and into capture register 1 (TBnCP1) upon the falling of TBxOUT
The value read from bit 5 of TBnMOD is "1."
Function
input. Takes count values into capture register 1 (TBnCP1) upon the rising of TBnIN1 pin input.
input. Takes count values into capture register 1 (TBnCP1) upon the falling of TBnIN0 pin input.
Takes count values into capture register 0 (TBnCP0) upon the rising of TBnIN0 pin
Takes count values into capture register 0 (TBnCP0) upon the rising of TBnIN0 pin
This can
be read
as “0”.
15
23
31
R
0
7
Write “0”.
R/W
14
22
30
6
0
TMRBn Mode Register (n=0~11)
TMP19A44(rev1.3) 11-13
1: Don't
Capture
control by
software
0: Capture
software
TBnCP0
by
care
13
21
29
W
5
1
00: Disable
01: TBnIN0 ↑ TBnIN1 ↑
10: TBnIN0 ↑ TBnIN0 ↓
11: CAPTRG ↑ CAPTRG ↓
Capture timing
TBnCPM
12
20
28
4
1
0
R
R
R
0
0
0
TBnCPM
11
19
27
3
0
0
1:
Up-
counter
control
0:
Clear/disabl
e
TBnCLE
Clear/enabl
e
R/W
10
18
26
2
0
Selects source clock
00: TBnIN0 pin input
01: φT1
10: φT4
11: φT16
TBnCLK
17
25
1
1
0
9
TMP19A44
TBnCLK
16
24
0
0
0
8
2010-04-01