tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 294

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DMA Controller (DMAC)
Internal system clock
DREQ
DACKn
A [23:0]
A [15:0]
RD
WR
HWR
CSn
R/W
Internal system clock
DREQn
DACKn
A [23:0]
D [15:0]
RD
WR
HWR
CSn
R/W
•
•
(7+α) clock
(7+α) clock
Fig. 10.22 Level Mode (from External Memory to Internal RAM)
Data transfer from internal RAM to external memory (separate bus, 5-wait insertion, level
mode)
Fig. 10.21 shows two timing cycles in which 16-bit data is transferred twice from internal
RAM to external memory (16-bit width).
Data transfer from external memory to internal RAM (separate bus, 5-wait insertion, level
mode)
Fig. 10.22 shows two timing cycles in which 16-bit data is transferred twice from external
memory (16-bid width) to internal RAM.
Fig. 10.21 Level Mode (Internal RAM to External Memory)
TMP19A44 (rev1.3) 10-31
5 waits
5 waits
Add
Add
Data
Data
Data
Data
TMP19A44
2010-04-01