tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 47

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Clock/Standby Control
5.7.5 STOP Mode
in the STOP mode vary depending on the setting of the STBYCR2<DRVE>. Table 5.7 shows the pin states in the
STOP mode. When the STOP mode is released, the system clock output is started after the elapse of warm-up time
at the warm-up counter to allow the internal oscillators to stabilize. After the STOP mode is released, the system
returns to the operation mode that was active immediately before the STOP mode (NORMAL or SLOW), and starts
the operation.
warm-up time at the OSCCR0<WUPT2:0>.
(Note 2)
(Note 1)
In the STOP mode, all the internal circuits, including the internal oscillators, are brought to a stop. The pin states
It is necessary to make these settings before the instruction to enter the STOP mode is executed. Specify the
To shift from the NORMAL mode to the STOP mode on the TMP19A44, do not set
the OSCCR0<WUPT2:0> to "000" for the warm-up time setting. The internal
system recovery time cannot be satisfied when the system recovers from the
STOP mode. To shift from the SLOW mode to the STOP mode (high-speed clock is
stopped) be sure to set OSCCR0<WUPT2:0>＝”110” during warm-up time.
The setting in <DRVE> is valid in STOP mode. It is invalid in backup mode.
Table 5.7 Warm-up Settings for Transitions of Operation Modes
NORMAL→SLOW
SLOW→NORMAL
NORMAL→IDLE→ NORMAL
NORMAL→SLEEP→ NORMAL
NORMAL→STOP→ NORMAL
SLOW →IDLE→SLOW
SLOW →SLEEP→SLOW
SLOW→STOP →SLOW
NORMAL→Backup SLEEP→NORMAL
NORMAL→ Backup STOP →NORMAL
SLOW →Backup SLEEP→ SLOW
SLOW → Backup STOP → SLOW
Transition of operation mode
TMP19A44(rev1.3) 5-18
Required (Note)
Required (Note)
Warm-up setting
Not required
Not required
Required
Required
Required
Required
Required
Required
Required
X
TMP19A44
2010-04-01