tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 615

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Flash Memory Operation
(2) Basic operation
1) Read
2)
While commands are generally comprised of several bus cycles, the operation to apply the SW
command to the flash memory is called "bus write cycle." The bus write cycles are to be in a specific
sequential order and the flash memory will perform an automatic operation when the sequence of the
bus write cycle data and address of a command write operation is in accordance with a predefined
specific sequence. If any bus write cycle does not follow a predefined command write sequence, the
flash memory will terminate the command execution and return to the read mode. The address [31:20]
in each bus write cycle should be the virtual address [31:20] of command execution. It will be explained
later for the address bits [19:8].
Generally speaking, this flash memory device has the following two operation modes:
The mode to read memory data (Read mode)
The mode to automatically erase or rewrite memory data (Automatic operation)
Transition to the automatic mode is made by executing a command sequence while it is in the
memory read mode. In the automatic operation mode, flash memory data cannot be read and any
commands stored in the flash memory cannot be executed. In the automatic operation mode, any
interrupt or exception generation cannot set the device to the read mode except when a hardware
reset is generated. During automatic operation, be sure not to cause any exceptions other than
debug exceptions and reset while a DSU probe is connected. Any interrupt or exception generation
cannot set the device to the read mode except when a hardware reset is generated.
When data is to be read, the flash memory must be set to the read mode. The flash memory will be
set to the read mode immediately after power is applied, when CPU reset is removed, or when an
automatic operation is normally terminated. In order to return to the read mode from other modes
or after an automatic operation has been abnormally terminated, either the Read/reset command (a
software command to be described later) or a hardware reset is used. The device must also be in
the read mode when any command written on the flash memory is to be executed.
Read/reset command and Read command (software reset)
With the Read/reset command, the device is returned to the read mode after completing the
Command write
This flash memory uses the command control method. Commands are executed by executing a
command sequence to the flash memory. The flash memory executes automatic operation
commands according to the address and data combinations applied (refer to Command Sequence).
If it is desired to cancel a command write operation already in progress or when any incorrect
command sequence has been entered, the Read/reset command is to be executed. Then, the flash
memory will terminate the command execution and return to the read mode.
When an automatic operation is abnormally terminated, the flash memory cannot return to the
read mode by itself (When FLCS<FlashBusy> = 0, data read from the flash memory is
undefined.) In this case, the Read/reset command can be used to return the flash memory to
the read mode. Also, when a command that has not been completely written has to be
canceled, the Read/reset command must be used to return to the read mode. The Read
command is used to return to the read mode after executing the SW command to write the
data "0x0000_00F0" to an arbitrary address of the flash memory.
third bus write cycle.
TMP19A44 (rev1.3)24-30
TMP19A44
2010-04-01